Intel's U.S. Advanced Packaging Enables Next-Generation AI Semiconductors

One of the advanced packaging processes happening at Intel New Mexico's Fab 9 focuses on connecting smaller specialized chip tiles, or chiplets, into a single, high-performance system. A technology called Foveros allows Intel Foundry to connect these chiplets on a silicon interposer. It is easiest to think of that interposer like a pizza crust.

"Inside the fab, the chip attach tool is the first step in Intel's Foveros advanced packaging process," says Chris Seibert, Principal Engineer at New Mexico's Fab 9. "If we use a food analogy, this is the tool that brings in a 'pizza crust', or silicon wafer, and whatever 'pizza toppings' or specialized chiplets you want, we feed into the other side of this machine, and it attaches them to the top of that 'crust'."

Then it travels to a different tool that acts as a literal oven to bake that system together. Once it comes out, the overhead robot track system of FOUPs (front-opening unified pods) bring the wafer to another machine where epoxy fills in under and around those chiplets to make sure everything is pressed together.

Finally, the wafers are diced into individual packages in another tool using water-cooled blades for precision. "The great part about that process is it lets us take a bunch of different chips from different designs or different technology nodes and put them all together onto one wafer," Seibert says.

Using Foveros technology, individual chiplets function as a single, powerful unit that runs faster while handling massive workloads. Foveros helps laptop batteries last longer by placing power-hungry circuits on more power efficient process nodes. Laptops can become thinner, and edge computing devices can fit into smaller spaces without sacrificing performance. Foveros also allows for more features to be packed into a smaller footprint, from the factory floor to your desk.